Version 8 (modified by gmainland, 5 years ago) (diff)


GHC Status October 2012

The last 6 months

  • 7.4.2 released
  • 7.6.1 released
  • The RTS now supports changing the number of capabilities at runtime with Control.Concurrent.setNumCapabilities
  • Win64
  • polymorphis kinds, datakinds
  • deferred type errors
  • Multi-way if, and \case

The next 6 months

  • 7.6.2 plans: early 2013?
  • 7.8 plans: early 2013?
  • Data parallelism. We are currently completely rewriting our implementation of vectorisation avoidance [1] in GHC's vectoriser. This leads to an overall much simpler and more robust vectoriser. In particular, it will be more liberal in allowing scalar subcomputations imported from modules compiled without vectorisation (such as the standard Prelude). This should finally enable us to get rid of the specialised, mini-Prelude in the DPH libraries.

After having solved the problem of obtaining asymptotically work-efficient vectorisation [2], we are now turning to improving the constants in the DPH libraries, and in particular, to achieve more reliable fusion in the presence of segmented operations, folds, and parallelism. Ben Lippmeier has a few exciting ideas on major improvements in that direction that we will discuss in more detail once we have conducted more experiments. We plan to finish the new vectorisation-avoidance infrastructure in time for GHC 7.8, but the new fusion system will likely not be ready in time for that release.

Moreover, Trevor McDonell has made good progress in devising a novel fusion system for the embedded Accelerate GPU language. We hope to be able to release it around the same time as GHC 7.8.

  • dynlibs-by-default
  • type holes

  • new codegen by default
  • Improved floating point register allocation. On x86-64 there are now six machine registers available for any mixture of floating-point types. Previously a maximum of four values of type Float and two values of type Double could simultaneously be kept in machine registers.
  • SIMD primitives. The simd branch now supports passing SSE vector values in machine registers. We expect the simd branch to be merged in time for 7.8.