Changes between Version 15 and Version 16 of SIMD


Ignore:
Timestamp:
Nov 11, 2011 1:16:47 PM (2 years ago)
Author:
duncan
Comment:

add DPH bit

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  • SIMD

    v15 v16  
    233233We might want some other solution so we can use `+#` as well as `addInt#` since `+8#` as an infix operator doesn't really work. 
    234234 
    235  
    236 == Sub-architecture challenges == 
    237  
    238 TODO: make sure we've made clear our proposed design: 
    239  
    240 Decision: 
    241  * fixed native size vector per arch, not sub-arch, picked as max 
    242  * instruction selection is per-module via -msse -mavx 
    243  * worker/wrapper with common and specialised ABI including rationale for why this should perform well enough vs compiling everything with one ABI 
    244  
    245235== Native vector sizes == 
    246236 
     
    270260The native-sized vector types are distinct types from the explicit-sized vector types, not type aliases for the corresponding explicit-sized vector. This is to support and encourage portable code. 
    271261 
     262== Data Parallel Haskell ([http://www.haskell.org/haskellwiki/GHC/Data_Parallel_Haskell DPH]) layer == 
     263 
     264In DPH, we will use the new SIMD instructions by suitably modifying the definition of the lifted versions of arithmetic and other operations that we would like to accelerate. These lifted operations are defined in the `dph-common` package and made accessible to the vectoriser via [wiki:DataParallel/VectPragma VECTORISE pragmas]. Many of them currently use `VECTORISE SCALAR` pragmas, such as 
     265{{{ 
     266(+) :: Int -> Int -> Int 
     267(+) = (P.+) 
     268{-# VECTORISE SCALAR (+) #-} 
     269}}} 
     270We could define them more verbosely using a plain `VECTORISE` pragma, but might instead like to extend `VECTORISE SCALAR` or introduce a variant. 
     271 
     272'''NB:''' The use of SIMD instructions interferes with vectorisation avoidance for scalar subcomputations. Code that avoids vectorisation also avoids the use of SIMD instructions. We would like to use SIMD instructions, but still avoid full-scale vectorisation. This should be possible, but it is not immediately clear how to realise it (elegantly). 
     273 
    272274== ABIs and calling conventions == 
    273275