Changes between Version 1 and Version 2 of Commentary/Compiler/Backends/NCG


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Timestamp:
Nov 13, 2006 8:33:30 PM (9 years ago)
Author:
p_tanski
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  • Commentary/Compiler/Backends/NCG

    v1 v2  
    55After GHC has produced Cmm (use -ddump-cmm or -ddump-opt-cmm to view), the Native Code Generator (NCG) transforms [wiki:Commentary/Compiler/CmmType Cmm] into architecture-specific assembly code.  The NCG is located in [[GhcFile(compiler/nativeGen)]] and is separated into eight modules: 
    66 
    7  * [[GhcFile(compiler/nativeGen/AsmCodeGen.lhs)]] 
    8  * [[GhcFile(compiler/nativeGen/MachCodeGen.hs)]] 
    9  * [[GhcFile(compiler/nativeGen/MachInstrs.hs)]] 
    10  * [[GhcFile(compiler/nativeGen/NCGMonad.hs)]] 
    11  * [[GhcFile(compiler/nativeGen/PositionIndependentCode.hs)]] 
    12  * [[GhcFile(compiler/nativeGen/PprMach.hs)]] 
    13  * [[GhcFile(compiler/nativeGen/RegAllocInfo.hs)]] 
    14  * [[GhcFile(compiler/nativeGen/RegisterAlloc.hs)]] 
     7 * [[GhcFile(compiler/nativeGen/AsmCodeGen.lhs)]][[BR]] 
     8   top-level module for the NCG, imported by [[GhcFile(compiler/main/CodeOutput.lhs)]]; also defines the Monad for optimising generic Cmm code, {{{CmmOptM}}}[[BR]][[BR]] 
     9 * [[GhcFile(compiler/nativeGen/MachCodeGen.hs)]][[BR]] 
     10   generates architecture-specific instructions (a Haskell-representation of assembler) from Cmm code[[BR]][[BR]] 
     11 * [[GhcFile(compiler/nativeGen/MachInstrs.hs)]][[BR]] 
     12   contains data definitions and some functions (comparison, size, simple conversions) for machine instructions, mostly carried out through the {{{Instr}}} data type, defined here[[BR]][[BR]] 
     13 * [[GhcFile(compiler/nativeGen/NCGMonad.hs)]][[BR]] 
     14   defines the the main monad in the NCG: the Native code Machine instruction Monad, {{{NatM}}}, and related functions.  ''Note: the NCG switches between two monads at times, especially in {{{AsmCodeGen}}}: {{{NatM}}} and the {{{UniqSM}}} Monad used throughout the compiler.''[[BR]][[BR]] 
     15 * [[GhcFile(compiler/nativeGen/PositionIndependentCode.hs)]][[BR]] 
     16   handles generation of position independent code and issues related to dynamic linking in the NCG; related to many other modules outside the NCG that handle symbol import, export and references, including {{{CLabel}}}, {{{Cmm}}}, {{{codeGen}}} and the RTS, and the Mangler[[BR]][[BR]] 
     17 * [[GhcFile(compiler/nativeGen/PprMach.hs)]][[BR]] 
     18   Pretty prints machine instructions ({{{Instr}}}) to assembler code (currently readable by GNU's {{{as}}}), with some small modifications, especially for comparing and adding floating point numbers on x86 architectures[[BR]][[BR]] 
     19 * [[GhcFile(compiler/nativeGen/RegAllocInfo.hs)]][[BR]] 
     20   defines the main register information function, {{{regUsage}}}, which takes a set of real and virtual registers and returns the actual registers used by a particular {{{Instr}}}; register allocation is in AT&T syntax order (source, destination), in an internal function, {{{usage}}}; defines the {{{RegUsage}}} data type[[BR]][[BR]] 
     21 * [[GhcFile(compiler/nativeGen/RegisterAlloc.hs)]][[BR]] 
     22   one of the most complicated modules in the NCG, {{{RegisterAlloc}}} manages the allocation of registers for each ''basic block'' of Haskell-abstracted assembler code: management involves ''liveness'' analysis, allocation or deletion of temporary registers, ''spilling'' temporary values to the ''spill stack'' (memory) and many other optimisations.  ''Note: much of this detail will be described later; '''basic block''' is defined below.'' 
    1523 
    1624and one header file: 
    1725 
    18  * [[GhcFile(compiler/nativeGen/NCG.h)]] 
     26 * [[GhcFile(compiler/nativeGen/NCG.h)]][[BR]] 
     27   defines macros used to separate architecture-specific code in the Haskell NCG files; since GHC currently only generates machine code for the architecture on which it was compiled (GHC is not currently a cross-compiler), the Haskell NCG files become considerably smaller after preprocessing; ideally all architecture-specific code would reside in separate files and GHC would have them available to support cross-compiler capabilities. 
    1928 
    2029The NCG runs through two main phases: a '''machine-independent''' phase and a '''machine-dependent''' phase.   
    2130 
    22 The '''machine-independent''' phase begins with ''Cmm blocks.''  A ''Cmm block'' is roughly parallel to a Cmm function or procedure in the same way as a compiler may generate a C function into a block of assembler instructions.  ''Cmm block''s are held as lists of {{{Cmm}}} statements ({{{[CmmStmt]}}}, defined in [[GhcFile(compiler/cmm/Cmm.hs)]], or {{{type CmmStmts}}}, defined in [[GhcFile(compiler/cmm/CmmUtils.hs)]]).  A machine-specific (assembler) instruction is represented as a {{{Instr}}}, defined in [[GhcFile(compiler/nativeGen/MachInstrs.hs)]]. During this phase: 
     31The '''machine-independent''' phase begins with ''Cmm blocks.''  A ''Cmm block'' is roughly parallel to a Cmm function or procedure in the same way as a compiler may generate a C function into a block of assembler instructions.  ''Cmm block''s are held as lists of {{{Cmm}}} statements ({{{[CmmStmt]}}}, defined in [[GhcFile(compiler/cmm/Cmm.hs)]], or {{{type CmmStmts}}}, defined in [[GhcFile(compiler/cmm/CmmUtils.hs)]]).  A machine-specific (assembler) instruction is represented as a {{{Instr}}}. During this phase: 
    2332 1. each Cmm block is ''lazily'' converted to machine-specific instructions ({{{Instr}}}) operating on an infinite number of registers;[[BR]][[BR]] 
    24  1. for each ''basic block'' (a, contiguous block of instructions with no branches (jumps) in each ''{{{Cmm}}} block''), real registers are ''lazily'' allocated based on the number of available registers on the target machine (say, 32 integer and 32 floating-point registers on the PowerPC architecture),[[BR]][[BR]]if a basic block simultaneously requires more registers than are available on the target machine and the temporary variable needs to be used (would sill be ''live'') after the current instruction, it will be moved (''spilled'') into memory; and,[[BR]][[BR]] 
     33 1. for each ''basic block'' (a, contiguous block of instructions with no branches (jumps) in each ''{{{Cmm}}} block''), real registers are ''lazily'' allocated based on the number of available registers on the target machine (say, 32 integer and 32 floating-point registers on the PowerPC architecture).[[BR]]''Note'': if a basic block simultaneously requires more registers than are available on the target machine and the temporary variable needs to be used (would sill be ''live'') after the current instruction, it will be moved (''spilled'') into memory; and,[[BR]][[BR]] 
    2534 1. each Cmm block is optimised by reordering its basic blocks from the original order (the {{{Instr}}} order from the {{{Cmm}}}) to minimise the number of branches between basic blocks, in other words, by maximising fallthrough of execution from one basic block to the next. 
    2635