Changes between Version 6 and Version 7 of Commentary/Compiler/Backends/NCG/RegisterAllocator


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Sep 18, 2007 1:06:07 PM (7 years ago)
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  • Commentary/Compiler/Backends/NCG/RegisterAllocator

    v6 v7  
    55The register allocator is responsible for assigning real/hardware regs (hregs) to each of the virtual regs (vregs) present in the code emitted by the native code generator. It also inserts spill/reload instructions to save vregs to the stack in situations where not enough hregs are available.  
    66 
    7 GHC currently provides two register allocation algorithms, simple linear scan and graph coloring. Although some of the code is shared between the two, as we only want to maintain a single algorithm, support for linear scan will be removed in a subsequent version. 
    8  
    9 In the meantime, there are three options for register allocation: 
     7GHC currently provides three register allocation algorithms, one which does simple lineear scan and two version of graph coloring. Support for linear scan is likely to be removed in a subequent version. 
    108 
    119 * '''Linear scan'''[[BR]] 
    12    The linear allocator is currently turned on by default. This is what you get when you compile with {{{-fasm}}}. The linear allocator does a single pass through the code, allocating registers on a first-come-first-served basis. It is quick, and does a reasonable job for code with little register pressure. It has no look-ahead. If say, a particular register will be clobbered by a function call, it does not know to avoid allocating to that register in the code before the call and subsequently inserts more spill/reload instructions than the other algorithms. 
     10   The linear allocator is turned on by default. This is what you get when you compile with {{{-fasm}}}. The linear allocator does a single pass through the code, allocating registers on a first-come-first-served basis. It is quick, and does a reasonable job for code with little register pressure.  
     11 
     12This algorithm has no look-ahead. If say, a particular hreg will be clobbered by a function call, it does not know to avoid allocating to it in the code before the call, and subsequently inserts more spill/reload instructions than strictly needed. 
    1313 
    1414 * '''Graph coloring''' (enabled with {{{-fregs-graph}}})[[BR]] 
    15    The graph coloring algorithm operates on the code for a whole function at a time. From each function it extracts a register conflict graph. The conflict graph has a node for every vreg in the code and an edge between two vregs if they are in use at the same time and thus cannot share the same hreg. It tries to assign hregs (represented as colors) to the nodes so that no two adjacent nodes share the same color, if it can't then it inserts spill code, rebuilds the graph and tries again. This algorithm tends to do better than the linear allocator because the conflict graph helps it avoid the look-ahead problem. The coloring allocator also tries to allocate the source and destination of register-to-register move instruction to the same hreg. This is done by coalescing (merging) move-related nodes. If this succeeds then the move instruction can be erased. 
     15   The graph coloring algorithm operates on the code for a whole function at a time. From each function it extracts a register conflict graph which has a node for every vreg and an edge between two vregs if they are in use at the same time and thus cannot share the same hreg. The algorithm tries to assign hregs (represented as colors) to the nodes so that no two adjacent nodes share the same color, if it can't then it inserts spill code, rebuilds the graph and tries again.  
     16 
     17Graph coloring tends to do better than the linear allocator because the conflict graph helps it avoid the look-ahead problem. The coloring allocator also tries harder to allocate the source and destination of reg-to-reg move instructions to the same hreg. This is done by coalescing (merging) move-related nodes. If this succeeds then the moves can be erased. 
    1618 
    1719 * '''Graph coloring with iterative coalescing''' (enabled with {{{-fregs-iterative}}})[[BR]] 
    1820   Iterative coalescing is an improvement over regular graph coloring whereby coalescing passes are interleaved with coloring passes. Iterative coalescing does a better job than regular graph coloring, but is slower because it must alternate between the coloring and coalescing of nodes. 
    1921 
     22== Code map == 
    2023 
    21 == [wiki:Commentary/Compiler/Backends/NCG/RegisterAllocator/Code Code map] == 
    22  
     24For an outline of the code see [wiki:Commentary/Compiler/Backends/NCG/RegisterAllocator/Code] 
    2325 
    2426== References == 
    2527 
    26 If you decide to do some hacking on the register allocator I would take a look at (at least) these papers first: 
     28If you decide to do some hacking on the register allocator then take a look at (at least) these papers first: 
    2729 
    2830'''Iterated Register Coalescing'''[[BR]] 
     
    3234'''A Generalised Algorithm for Graph-Coloring Register Allocation'''[[BR]] 
    3335''Smith, Ramsey, Holloway, 2004''[[BR]] 
    34 For a decription of how to deal with overlapping register sets, which aren't fully implemented yet. Explains what the {{{worst}}}, {{{squeese}}} and {{{triv}}}functions are for. 
     36For a decription of how to deal with overlapping register sets, which aren't fully implemented yet. Explains what the {{{worst}}}, {{{squeese}}} and {{{triv}}} functions are for. 
    3537 
    3638'''Design and Implementation of a Graph Coloring Register Allocator for GCC'''[[BR]] 
     
    4143== Hacking/Debugging == 
    4244 
    43 {{{-fasm-lint}}}[[BR]] 
    44 Breaking the allocator can result in compiled programs crashing randomly (if you're lucky) or producing the wrong output, which can hard to debug. 
    45 When working on the allocator, make sure to always turn on {{{-fasm-lint}}} this will call {{{GraphOps.validateGraph}}} after every spill/color stage. {{{validateGraph}}} checks that all the edges point to valid nodes, that no conflicting nodes have the same color, and if the graph is supposed to be colored then all nodes are really colored. 
     45'''{{{-fasm-lint}}}'''[[BR]] 
     46Breaking the allocator can result in compiled programs crashing randomly (if you're lucky) or producing the wrong output. 
     47 
     48When working on the allocator, make sure to always turn on {{{-fasm-lint}}}. Doing this makes the allocator call {{{GraphOps.validateGraph}}} after every spill/color stage. {{{validateGraph}}} checks that all the edges point to valid nodes, that no conflicting nodes have the same color, and if the graph is supposed to be colored then all nodes are really colored. 
    4649 
    4750The main dump flags are 
    4851 
    4952 {{{-ddump-asm-regalloc-stages}}}[[BR]] 
    50  
     53 Shows the code and conflict graph after ever spill/color stage. Also shows spill costs, and what registers were coalesced. 
    5154 
    5255 {{{-ddump-asm-stats}}}[[BR]] 
    53  
     56 Gives statistics about how many spills/reloads/reg-reg-moves are in the output program. 
    5457 
    5558 {{{-ddump-asm}}}[[BR]] 
     59 Gives the final output code.  
     60 
     61 {{{-ddump-to-file}}}[[BR]] 
     62 Diverts dump outputs to files. This can be used to get dumps from each module in a nofib benchmark. 
     63 
     64 Compile eg 
    5665  
    57  {{{-ddump-to-file}}}[[BR]] 
     66 cd nofib/real/anna 
     67 
     68 make EXTRA_HC_OPTS="-O2 -fregs-iterative -ddump-to-file -ddump-asm-regalloc-stages" 
    5869 
    5970