Opened 2 years ago

Last modified 21 months ago

#9350 new feature request

Consider using xchg instead of mfence for CS stores

Reported by: tibbe Owned by:
Priority: normal Milestone:
Component: Compiler (NCG) Version: 7.9
Keywords: Cc: simonmar
Operating System: Unknown/Multiple Architecture: Unknown/Multiple
Type of failure: Runtime performance bug Test Case:
Blocked By: Blocking:
Related Tickets: Differential Rev(s):
Wiki Page:

Description

To get sequential consistency for atomicWriteIntArray# we use an mfence instruction. An alternative is to use an xchg instruction (which has an implicit lock prefix), which might have lower latency. We should check what other compilers do.

Change History (3)

comment:1 Changed 2 years ago by tibbe

Herb Sutter argues for using xchg over mfence in C++ and Beyond 2012: Herb Sutter - atomic<> Weapons, 2 of 2, around 0:38:20.

comment:2 Changed 2 years ago by tibbe

GCC 4.9.1 does use mfence. This code

#include <stdatomic.h>

void f(atomic_int* obj, int val) {
  return atomic_store(obj, val);
}

generates this assembly

        .file   "repro.c"
        .text
        .globl  f
        .type   f, @function
f:
.LFB0:
        .cfi_startproc
        movl    %esi, (%rdi)
        mfence
        ret
        .cfi_endproc
.LFE0:
        .size   f, .-f
        .ident  "GCC: (GNU) 4.9.1"
        .section        .note.GNU-stack,"",@progbits

comment:3 Changed 21 months ago by thomie

  • Cc simonmar added
  • Component changed from Compiler to Compiler (NCG)
  • Type of failure changed from None/Unknown to Runtime performance bug
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