#7640 closed bug (fixed)

Crash in stg_ap_p_fast on ARM on executable output by registerised/LLVM cross compiler

Reported by: StephenBlackheath Owned by: dterei
Priority: normal Milestone:
Component: Compiler (LLVM) Version: 7.7
Keywords: Cc:
Operating System: Unknown/Multiple Architecture: arm
Type of failure: Runtime crash Difficulty: Unknown
Test Case: Blocked By:
Blocking: #7623 Related Tickets:

Description

Tested here with the latest master ghc and llvm-3.2, cross compiled to arm linux.

singpolyma has noted this bug also at: http://osdir.com/ml/glasgow-haskell-users@haskell.org/2013-01/msg00237.html

This debug session shows that at the end of stg_ap_p_fast it is jumping to what would appear to be a garbage address.

root@ldu:~# gdb ./hello
GNU gdb (GDB) 7.0.1-debian
Copyright (C) 2009 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.  Type "show copying"
and "show warranty" for details.
This GDB was configured as "arm-linux-gnueabi".
For bug reporting instructions, please see:
<http://www.gnu.org/software/gdb/bugs/>...
Reading symbols from /root/hello...done.
(gdb) run
Starting program: /root/hello 
[Thread debugging using libthread_db enabled]

Program received signal SIGILL, Illegal instruction.
0xb6c0300c in ?? ()
(gdb) where
#0  0xb6c0300c in ?? ()
#1  0x003e4358 in stg_ap_p_fast ()
#2  0x003e4358 in stg_ap_p_fast ()
Backtrace stopped: previous frame identical to this frame (corrupt stack?)
(gdb) up         
#1  0x003e4358 in stg_ap_p_fast ()
(gdb) disassemble
Dump of assembler code for function stg_ap_p_fast:
0x003e4278 <stg_ap_p_fast+0>:	and	r3, r7, #3
0x003e427c <stg_ap_p_fast+4>:	cmp	r3, #1
0x003e4280 <stg_ap_p_fast+8>:	bne	0x3e4298 <stg_ap_p_fast+32>
0x003e4284 <stg_ap_p_fast+12>:	sub	r3, r7, #1
0x003e4288 <stg_ap_p_fast+16>:	ldr	r0, [r3]
0x003e428c <stg_ap_p_fast+20>:	mov	lr, pc
0x003e4290 <stg_ap_p_fast+24>:	mov	pc, r0
0x003e4294 <stg_ap_p_fast+28>:	mov	pc, lr
0x003e4298 <stg_ap_p_fast+32>:	bic	r7, r7, #3
0x003e429c <stg_ap_p_fast+36>:	ldr	r0, [r7]
0x003e42a0 <stg_ap_p_fast+40>:	ldrsh	r3, [r0, #-4]
0x003e42a4 <stg_ap_p_fast+44>:	sub	r3, r3, #9
0x003e42a8 <stg_ap_p_fast+48>:	cmp	r3, #7
0x003e42ac <stg_ap_p_fast+52>:	bcs	0x3e42cc <stg_ap_p_fast+84>
0x003e42b0 <stg_ap_p_fast+56>:	ldrh	r3, [r0, #-10]
0x003e42b4 <stg_ap_p_fast+60>:	cmp	r3, #1
0x003e42b8 <stg_ap_p_fast+64>:	bne	0x3e42d8 <stg_ap_p_fast+96>
0x003e42bc <stg_ap_p_fast+68>:	orr	r7, r7, #1
0x003e42c0 <stg_ap_p_fast+72>:	mov	lr, pc
0x003e42c4 <stg_ap_p_fast+76>:	mov	pc, r0
0x003e42c8 <stg_ap_p_fast+80>:	mov	pc, lr
0x003e42cc <stg_ap_p_fast+84>:	sub	r5, r5, #4
---Type <return> to continue, or q <return> to quit---
0x003e42d0 <stg_ap_p_fast+88>:	bl	0x3e5dc4 <stg_ap_p_info>
0x003e42d4 <stg_ap_p_fast+92>:	mov	pc, lr
0x003e42d8 <stg_ap_p_fast+96>:	lsl	r2, r3, #16
0x003e42dc <stg_ap_p_fast+100>:	cmp	r3, #3
0x003e42e0 <stg_ap_p_fast+104>:	add	r6, r6, #16
0x003e42e4 <stg_ap_p_fast+108>:	sub	r3, r5, #4
0x003e42e8 <stg_ap_p_fast+112>:	asr	r1, r2, #16
0x003e42ec <stg_ap_p_fast+116>:	ldr	r2, [r4, #132]	; 0x84
0x003e42f0 <stg_ap_p_fast+120>:	addls	r7, r7, r1
0x003e42f4 <stg_ap_p_fast+124>:	cmp	r6, r2
0x003e42f8 <stg_ap_p_fast+128>:	bls	0x3e4318 <stg_ap_p_fast+160>
0x003e42fc <stg_ap_p_fast+132>:	mov	r5, #16
0x003e4300 <stg_ap_p_fast+136>:	str	r5, [r4, #156]	; 0x9c
0x003e4304 <stg_ap_p_fast+140>:	ldr	r5, [pc, #84]	; 0x3e4360 <stg_ap_p_fast+232>
0x003e4308 <stg_ap_p_fast+144>:	str	r5, [r3]
0x003e430c <stg_ap_p_fast+148>:	mov	r5, r3
0x003e4310 <stg_ap_p_fast+152>:	bl	0x3dee98 <__stg_gc_enter_1>
0x003e4314 <stg_ap_p_fast+156>:	mov	pc, lr
0x003e4318 <stg_ap_p_fast+160>:	ldr	r0, [pc, #60]	; 0x3e435c <stg_ap_p_fast+228>
0x003e431c <stg_ap_p_fast+164>:	add	r1, r1, #255	; 0xff
0x003e4320 <stg_ap_p_fast+168>:	mov	r2, r6
---Type <return> to continue, or q <return> to quit---
0x003e4324 <stg_ap_p_fast+172>:	add	r1, r1, #65280	; 0xff00
0x003e4328 <stg_ap_p_fast+176>:	str	r0, [r2, #-12]!
0x003e432c <stg_ap_p_fast+180>:	strh	r1, [r6, #-8]
0x003e4330 <stg_ap_p_fast+184>:	sub	r1, r6, #4
0x003e4334 <stg_ap_p_fast+188>:	str	r7, [r1]
0x003e4338 <stg_ap_p_fast+192>:	mov	r7, #1
0x003e433c <stg_ap_p_fast+196>:	strh	r7, [r6, #-6]
0x003e4340 <stg_ap_p_fast+200>:	ldr	r7, [r3, #4]
0x003e4344 <stg_ap_p_fast+204>:	str	r7, [r6]
0x003e4348 <stg_ap_p_fast+208>:	ldr	r0, [r5, #4]!
0x003e434c <stg_ap_p_fast+212>:	mov	r7, r2
0x003e4350 <stg_ap_p_fast+216>:	mov	lr, pc
0x003e4354 <stg_ap_p_fast+220>:	mov	pc, r0
0x003e4358 <stg_ap_p_fast+224>:	mov	pc, lr
0x003e435c <stg_ap_p_fast+228>:	eorseq	lr, sp, r0, ror #2
0x003e4360 <stg_ap_p_fast+232>:	eorseq	r5, lr, r4, asr #27
End of assembler dump.
(gdb) break *0x003e4354
Breakpoint 1 at 0x3e4354
(gdb) run
The program being debugged has been started already.
Start it from the beginning? (y or n) y
Starting program: /root/hello 
[Thread debugging using libthread_db enabled]

Breakpoint 1, 0x003e4354 in stg_ap_p_fast ()
(gdb) info registers
r0             0xb6c02000	3066044416
r1             0xb6c02010	3066044432
r2             0xb6c02008	3066044424
r3             0xb6c033ac	3066049452
r4             0x452910	4532496
r5             0xb6c033b4	3066049460
r6             0xb6c02014	3066044436
r7             0xb6c02008	3066044424
r8             0x42c818	4376600
r9             0xb6ff76e0	3070195424
r10            0x452ab8	4532920
r11            0xb6c03064	3066048612
r12            0x0	0
sp             0xbeffdc00	0xbeffdc00
lr             0x3e4358	4080472
pc             0x3e4354	0x3e4354 <stg_ap_p_fast+220>
fps            0x1001000	16781312
cpsr           0x80000010	2147483664
(gdb) stepi
0xb6c02000 in ?? ()
(gdb) 

Change History (7)

comment:1 Changed 15 months ago by StephenBlackheath

hello.hs:

main = putStrLn "Hello, World!"

but same behaviour with just main = return ()

comment:2 Changed 15 months ago by StephenBlackheath

  • Blocking 7623 added

comment:3 Changed 15 months ago by StephenBlackheath

Also note - I am using (old) ARMv5 architecture.

comment:4 Changed 15 months ago by StephenBlackheath

The C-- gives a switch with 5 cases + default, but the LL seems to have a jump table with only two cases. The resulting ARM code seems to match the LL (and is shorter than I would expect for the CMM).

I don't understand LLVM and C-- very well, but that doesn't seem right.

INFO_TABLE_RET(stg_ap_p, RET_SMALL, W_ info_ptr, gcptr arg1, )
{
    W_ info;
    W_ arity;
    
    IF_DEBUG(apply,foreign "C" debugBelch("stg_ap_p_ret... "); foreign "C" printClosure(R1 "ptr"));
    IF_DEBUG(sanity,foreign "C" checkStackFrame(Sp+WDS(2)"ptr"));
    ASSERT(LOOKS_LIKE_CLOSURE_PTR(Sp(1)));
    again:
    if (GETTAG(R1)==1) {
      Sp_adj(1);
      jump %GET_ENTRY(R1-1) [R1];
    }
    R1 = UNTAG(R1);
    info = %INFO_PTR(R1);
    switch [INVALID_OBJECT .. N_CLOSURE_TYPES] (TO_W_(%INFO_TYPE(%STD_INFO(info)))) {
        case BCO: {
            arity = TO_W_(StgBCO_arity(R1));
            ASSERT(arity > 0);
            if (arity == 1) {
                Sp_adj(1);
                jump ENTRY_LBL(stg_BCO) [R1];
            } else {
                BUILD_PAP(1,1,stg_ap_p_info,BCO);
            }
        }
        case FUN,
             FUN_1_0,
             FUN_0_1,
             FUN_2_0,
             FUN_1_1,
             FUN_0_2,
             FUN_STATIC: {
            arity = TO_W_(StgFunInfoExtra_arity(%FUN_INFO(info)));
            ASSERT(arity > 0);
            if (arity == 1) {
                Sp_adj(1);
                R1 = R1 + 1;
                jump %GET_ENTRY(UNTAG(R1)) [R1];
            } else {
                if (arity < 4) {
                  R1 = R1 + arity;
                }
                BUILD_PAP(1,1,stg_ap_p_info,FUN);
            }
        }
        case PAP: {
            arity = TO_W_(StgPAP_arity(R1));
            ASSERT(arity > 0);
            if (arity == 1) {
                Sp_adj(1);
                R2 = stg_ap_p_info;
                jump stg_PAP_apply [R1,R2];
            } else {
                NEW_PAP(1,1,stg_ap_p_info,PAP);
            }
        }
        
        case AP,
             AP_STACK,
             BLACKHOLE,
             WHITEHOLE,
             THUNK,
             THUNK_1_0,
             THUNK_0_1,
             THUNK_2_0,
             THUNK_1_1,
             THUNK_0_2,
             THUNK_STATIC,
             THUNK_SELECTOR: {
            Sp(0) = stg_ap_p_info;
            jump_SAVE_CCCS(%ENTRY_CODE(info));
            
        }
        case IND,
             IND_STATIC,
             IND_PERM: {
            R1 = StgInd_indirectee(R1);
            goto again;
        }
        
        default: {
            foreign "C" barf("stg_ap_p_ret") never returns;
        }
    }
}

and the ll looks like this:

define  cc 10 void @stg_ap_p_fast(i32* noalias nocapture %Base_Arg,
    i32* noalias nocapture %Sp_Arg, i32* noalias nocapture %Hp_Arg, i32 %R1_Arg,
    i32 %R2_Arg, i32 %R3_Arg, i32 %R4_Arg, i32 %SpLim_Arg) align 4 nounwind
{
cCP:
  %Base_Var = alloca i32*, i32 1
  store i32* %Base_Arg, i32** %Base_Var
  %Sp_Var = alloca i32*, i32 1
  store i32* %Sp_Arg, i32** %Sp_Var
  %Hp_Var = alloca i32*, i32 1
  store i32* %Hp_Arg, i32** %Hp_Var
  %R1_Var = alloca i32, i32 1
  store i32 %R1_Arg, i32* %R1_Var
  %R2_Var = alloca i32, i32 1
  store i32 undef, i32* %R2_Var
  %R3_Var = alloca i32, i32 1
  store i32 undef, i32* %R3_Var
  %R4_Var = alloca i32, i32 1
  store i32 undef, i32* %R4_Var
  %SpLim_Var = alloca i32, i32 1
  store i32 %SpLim_Arg, i32* %SpLim_Var
  %lcD9 = alloca i32, i32 1
  %lcD8 = alloca i32, i32 1
  %lcDc = alloca i32, i32 1
  %lcDb = alloca i32, i32 1
  %ln4WG = load i32* %R1_Var
  %ln4WH = and i32 %ln4WG, 3
  %ln4WI = icmp eq i32 %ln4WH, 1
  br i1 %ln4WI, label %cD6, label %cD7

cCS:
  %ln4WJ = load i32** %Sp_Var
  %ln4WK = ptrtoint i32* %ln4WJ to i32
  %ln4WL = inttoptr i32 %ln4WK to i32*
  store i32* %ln4WL, i32** %Sp_Var
  %ln4WM = load i32* %R1_Var
  %ln4WN = add i32 %ln4WM, 1
  store i32 %ln4WN, i32* %R1_Var
  %ln4WO = load i32* %R1_Var
  %ln4WP = and i32 %ln4WO, -4
  %ln4WQ = inttoptr i32 %ln4WP to i32*
  %ln4WR = load i32* %ln4WQ, !tbaa !5
  %ln4WS = inttoptr i32 %ln4WR to void (i32*, i32*, i32*, i32, i32, i32, i32, i32)*
  %ln4WT = load i32** %Base_Var
  %ln4WU = load i32** %Sp_Var
  %ln4WV = load i32** %Hp_Var
  %ln4WW = load i32* %R1_Var
  %ln4WX = load i32* %SpLim_Var
  tail call cc 10 void (i32*,i32*,i32*,i32,i32,i32,i32,i32)* %ln4WS( i32* %ln4WT,
      i32* %ln4WU, i32* %ln4WV, i32 %ln4WW, i32 undef, i32 undef, i32 undef,
      i32 %ln4WX ) nounwind
  ret void

cCU:
  %ln4WY = load i32* %lcD9
  %ln4WZ = add i32 %ln4WY, 12
  %ln4X0 = load i32* %lcD8
  %ln4X1 = shl i32 %ln4X0, 2
  %ln4X2 = add i32 %ln4WZ, %ln4X1
  %ln4X3 = load i32** %Sp_Var
  %ln4X4 = ptrtoint i32* %ln4X3 to i32
  %ln4X5 = load i32* %lcD8
  %ln4X6 = add i32 %ln4X5, 1
  %ln4X7 = shl i32 %ln4X6, 2
  %ln4X8 = add i32 %ln4X4, %ln4X7
  %ln4X9 = inttoptr i32 %ln4X8 to i32*
  %ln4Xa = load i32* %ln4X9, !tbaa !5
  %ln4Xb = inttoptr i32 %ln4X2 to i32*
  store i32 %ln4Xa, i32* %ln4Xb, !tbaa !5
  %ln4Xc = load i32* %lcD8
  %ln4Xd = add i32 %ln4Xc, 1
  store i32 %ln4Xd, i32* %lcD8
  br label %cCW

cCV:
  %ln4Xe = load i32* %lcD9
  store i32 %ln4Xe, i32* %R1_Var
  %ln4Xf = load i32** %Sp_Var
  %ln4Xg = getelementptr inbounds i32* %ln4Xf, i32 2
  %ln4Xh = ptrtoint i32* %ln4Xg to i32
  %ln4Xi = inttoptr i32 %ln4Xh to i32*
  store i32* %ln4Xi, i32** %Sp_Var
  %ln4Xj = load i32** %Sp_Var
  %ln4Xk = getelementptr inbounds i32* %ln4Xj, i32 0
  %ln4Xl = bitcast i32* %ln4Xk to i32*
  %ln4Xm = load i32* %ln4Xl, !tbaa !1
  %ln4Xn = inttoptr i32 %ln4Xm to void (i32*, i32*, i32*, i32, i32, i32, i32, i32)*
  %ln4Xo = load i32** %Base_Var
  %ln4Xp = load i32** %Sp_Var
  %ln4Xq = load i32** %Hp_Var
  %ln4Xr = load i32* %R1_Var
  %ln4Xs = load i32* %SpLim_Var
  tail call cc 10 void (i32*,i32*,i32*,i32,i32,i32,i32,i32)* %ln4Xn( i32* %ln4Xo,
      i32* %ln4Xp, i32* %ln4Xq, i32 %ln4Xr, i32 undef, i32 undef, i32 undef,
      i32 %ln4Xs ) nounwind
  ret void

cCW:
  %ln4Xt = load i32* %lcD8
  %ln4Xu = icmp ult i32 %ln4Xt, 1
  br i1 %ln4Xu, label %cCU, label %cCV

cCY:
  %ln4Xv = load i32* %lcDc
  %ln4Xw = load i32** %Base_Var
  %ln4Xx = getelementptr inbounds i32* %ln4Xw, i32 39
  store i32 %ln4Xv, i32* %ln4Xx, !tbaa !4
  %ln4Xy = ptrtoint void (i32*, i32*, i32*, i32, i32, i32, i32, i32)* @stg_ap_p_info to i32
  %ln4Xz = load i32** %Sp_Var
  %ln4XA = getelementptr inbounds i32* %ln4Xz, i32 0
  store i32 %ln4Xy, i32* %ln4XA, !tbaa !1
  %ln4XB = load i32** %Base_Var
  %ln4XC = load i32** %Sp_Var
  %ln4XD = load i32** %Hp_Var
  %ln4XE = load i32* %R1_Var
  %ln4XF = load i32* %SpLim_Var
  tail call cc 10 void (i32*,i32*,i32*,i32,i32,i32,i32,i32)* @__stg_gc_enter_1(
      i32* %ln4XB, i32* %ln4XC, i32* %ln4XD, i32 %ln4XE, i32 undef, i32 undef,
      i32 undef, i32 %ln4XF ) nounwind
  ret void

cCZ:
  %ln4XG = load i32** %Hp_Var
  %ln4XH = getelementptr inbounds i32* %ln4XG, i32 1
  %ln4XI = ptrtoint i32* %ln4XH to i32
  %ln4XJ = load i32* %lcDc
  %ln4XK = sub i32 %ln4XI, %ln4XJ
  store i32 %ln4XK, i32* %lcD9
  %ln4XL = load i32* %lcD9
  %ln4XM = ptrtoint [0 x i32]* @stg_PAP_info to i32
  %ln4XN = inttoptr i32 %ln4XL to i32*
  store i32 %ln4XM, i32* %ln4XN, !tbaa !5
  %ln4XO = load i32* %lcD9
  %ln4XP = add i32 %ln4XO, 4
  %ln4XQ = load i32* %lcDb
  %ln4XR = add i32 %ln4XQ, -1
  %ln4XS = trunc i32 %ln4XR to i16
  %ln4XT = inttoptr i32 %ln4XP to i16*
  store i16 %ln4XS, i16* %ln4XT, !tbaa !5
  %ln4XU = load i32* %lcD9
  %ln4XV = add i32 %ln4XU, 8
  %ln4XW = load i32* %R1_Var
  %ln4XX = inttoptr i32 %ln4XV to i32*
  store i32 %ln4XW, i32* %ln4XX, !tbaa !5
  %ln4XY = load i32* %lcD9
  %ln4XZ = add i32 %ln4XY, 6
  %ln4Y0 = inttoptr i32 %ln4XZ to i16*
  store i16 1, i16* %ln4Y0, !tbaa !5
  store i32 0, i32* %lcD8
  br label %cCW

cD0:
  store i32 16, i32* %lcDc
  %ln4Y1 = load i32** %Hp_Var
  %ln4Y2 = ptrtoint i32* %ln4Y1 to i32
  %ln4Y3 = load i32* %lcDc
  %ln4Y4 = add i32 %ln4Y2, %ln4Y3
  %ln4Y5 = inttoptr i32 %ln4Y4 to i32*
  store i32* %ln4Y5, i32** %Hp_Var
  %ln4Y6 = load i32** %Hp_Var
  %ln4Y7 = ptrtoint i32* %ln4Y6 to i32
  %ln4Y8 = load i32** %Base_Var
  %ln4Y9 = getelementptr inbounds i32* %ln4Y8, i32 33
  %ln4Ya = bitcast i32* %ln4Y9 to i32*
  %ln4Yb = load i32* %ln4Ya, !tbaa !4
  %ln4Yc = icmp ugt i32 %ln4Y7, %ln4Yb
  br i1 %ln4Yc, label %cCY, label %cCZ

cD1:
  %ln4Yd = load i32* %R1_Var
  %ln4Ye = load i32* %lcDb
  %ln4Yf = add i32 %ln4Yd, %ln4Ye
  store i32 %ln4Yf, i32* %R1_Var
  br label %cD0

cD3:
  %ln4Yg = load i32** %Sp_Var
  %ln4Yh = getelementptr inbounds i32* %ln4Yg, i32 -1
  %ln4Yi = ptrtoint i32* %ln4Yh to i32
  %ln4Yj = inttoptr i32 %ln4Yi to i32*
  store i32* %ln4Yj, i32** %Sp_Var
  %ln4Yk = load i32* %lcDb
  %ln4Yl = icmp uge i32 %ln4Yk, 4
  br i1 %ln4Yl, label %cD0, label %cD1

cD4:
  %ln4Ym = load i32* %R1_Var
  %ln4Yn = inttoptr i32 %ln4Ym to i32*
  %ln4Yo = load i32* %ln4Yn, !tbaa !3
  %ln4Yp = add i32 %ln4Yo, -10
  %ln4Yq = inttoptr i32 %ln4Yp to i16*
  %ln4Yr = load i16* %ln4Yq, !tbaa !5
  %ln4Ys = sext i16 %ln4Yr to i32
  store i32 %ln4Ys, i32* %lcDb
  %ln4Yt = load i32* %lcDb
  %ln4Yu = icmp eq i32 %ln4Yt, 1
  br i1 %ln4Yu, label %cCS, label %cD3

cD5:
  %ln4Yv = load i32** %Sp_Var
  %ln4Yw = getelementptr inbounds i32* %ln4Yv, i32 -1
  %ln4Yx = ptrtoint i32* %ln4Yw to i32
  %ln4Yy = inttoptr i32 %ln4Yx to i32*
  store i32* %ln4Yy, i32** %Sp_Var
  %ln4Yz = load i32** %Base_Var
  %ln4YA = load i32** %Sp_Var
  %ln4YB = load i32** %Hp_Var
  %ln4YC = load i32* %R1_Var
  %ln4YD = load i32* %SpLim_Var
  tail call cc 10 void (i32*,i32*,i32*,i32,i32,i32,i32,i32)* @stg_ap_p_info(
      i32* %ln4Yz, i32* %ln4YA, i32* %ln4YB, i32 %ln4YC, i32 undef, i32 undef, i32 undef,
      i32 %ln4YD ) nounwind
  ret void

cD6:
  %ln4YE = load i32** %Sp_Var
  %ln4YF = ptrtoint i32* %ln4YE to i32
  %ln4YG = inttoptr i32 %ln4YF to i32*
  store i32* %ln4YG, i32** %Sp_Var
  %ln4YH = load i32* %R1_Var
  %ln4YI = add i32 %ln4YH, -1
  %ln4YJ = inttoptr i32 %ln4YI to i32*
  %ln4YK = load i32* %ln4YJ, !tbaa !3
  %ln4YL = inttoptr i32 %ln4YK to void (i32*, i32*, i32*, i32, i32, i32, i32, i32)*
  %ln4YM = load i32** %Base_Var
  %ln4YN = load i32** %Sp_Var
  %ln4YO = load i32** %Hp_Var
  %ln4YP = load i32* %R1_Var
  %ln4YQ = load i32* %SpLim_Var
  tail call cc 10 void (i32*,i32*,i32*,i32,i32,i32,i32,i32)* %ln4YL( i32* %ln4YM,
      i32* %ln4YN, i32* %ln4YO, i32 %ln4YP, i32 undef, i32 undef, i32 undef,
      i32 %ln4YQ ) nounwind
  ret void

cD7:
  %ln4YR = load i32* %R1_Var
  %ln4YS = and i32 %ln4YR, -4
  store i32 %ln4YS, i32* %R1_Var
  %ln4YT = load i32* %R1_Var
  %ln4YU = inttoptr i32 %ln4YT to i32*
  %ln4YV = load i32* %ln4YU, !tbaa !3
  %ln4YW = add i32 %ln4YV, -4
  %ln4YX = inttoptr i32 %ln4YW to i16*
  %ln4YY = load i16* %ln4YX, !tbaa !5
  %ln4YZ = sext i16 %ln4YY to i32
  switch i32 %ln4YZ, label %cD5 [i32 0, label %cD5
i32 1, label %cD5
i32 2, label %cD5
i32 3, label %cD5
i32 4, label %cD5
i32 5, label %cD5
i32 6, label %cD5
i32 7, label %cD5
i32 8, label %cD5
i32 9, label %cD4
i32 10, label %cD4
i32 11, label %cD4
i32 12, label %cD4
i32 13, label %cD4
i32 14, label %cD4
i32 15, label %cD4
i32 16, label %cD5
i32 17, label %cD5
i32 18, label %cD5
i32 19, label %cD5
i32 20, label %cD5
i32 21, label %cD5
i32 22, label %cD5
i32 23, label %cD5
i32 24, label %cD5
i32 25, label %cD5
i32 26, label %cD5
i32 27, label %cD5
i32 28, label %cD5
i32 29, label %cD5
i32 30, label %cD5
i32 31, label %cD5
i32 32, label %cD5
i32 33, label %cD5
i32 34, label %cD5
i32 35, label %cD5
i32 36, label %cD5
i32 37, label %cD5
i32 38, label %cD5
i32 39, label %cD5
i32 40, label %cD5
i32 41, label %cD5
i32 42, label %cD5
i32 43, label %cD5
i32 44, label %cD5
i32 45, label %cD5
i32 46, label %cD5
i32 47, label %cD5
i32 48, label %cD5
i32 49, label %cD5
i32 50, label %cD5
i32 51, label %cD5
i32 52, label %cD5
i32 53, label %cD5
i32 54, label %cD5
i32 55, label %cD5
i32 56, label %cD5
i32 57, label %cD5
i32 58, label %cD5
i32 59, label %cD5
i32 60, label %cD5
i32 61, label %cD5]

}

Here are the closure types:

static char *closure_type_names[] = {
  "INVALID_OBJECT",          	/* 0  */
  "CONSTR",                  	/* 1  */
  "CONSTR_1_0",			/* 2  */
  "CONSTR_0_1",			/* 3  */
  "CONSTR_2_0",			/* 4  */
  "CONSTR_1_1",			/* 5  */
  "CONSTR_0_2",			/* 6  */
  "CONSTR_INTLIKE",	        /* 7  */
  "CONSTR_CHARLIKE",	        /* 8  */
  "CONSTR_STATIC",	        /* 9  */
  "CONSTR_NOCAF_STATIC",     	/* 10 */
  "FUN",		        /* 11 */
  "FUN_1_0",		  	/* 12 */
  "FUN_0_1",		  	/* 13 */
  "FUN_2_0",		  	/* 14 */
  "FUN_1_1",		  	/* 15 */
  "FUN_0_2",			/* 16 */
  "FUN_STATIC",	        	/* 17 */
  "THUNK",		        /* 18 */
  "THUNK_1_0",	  		/* 19 */
  "THUNK_0_1",	  		/* 20 */
  "THUNK_2_0",	  		/* 21 */
  "THUNK_1_1",	  		/* 22 */
  "THUNK_0_2",			/* 23 */
  "THUNK_STATIC",	        /* 24 */
  "THUNK_SELECTOR",	        /* 25 */
  "BCO",		        /* 26 */
  "AP_UPD",		        /* 27 */
  "PAP",			/* 28 */
  "IND",		        /* 29 */
  "IND_OLDGEN",	        	/* 30 */
  "IND_PERM",	        	/* 31 */
  "IND_OLDGEN_PERM",	        /* 32 */
  "IND_STATIC",	        	/* 33 */
  "CAF_UNENTERED",           	/* 34 */
  "CAF_ENTERED",		/* 35 */
  "CAF_BLACKHOLE",		/* 36 */
  "RET_BCO",                 	/* 37 */
  "RET_SMALL",	        	/* 38 */
  "RET_VEC_SMALL",	        /* 39 */
  "RET_BIG",		        /* 40 */
  "RET_VEC_BIG",	        /* 41 */
  "RET_DYN",		        /* 42 */
  "UPDATE_FRAME",	        /* 43 */
  "CATCH_FRAME",	        /* 44 */
  "STOP_FRAME",	        	/* 45 */
  "SEQ_FRAME",	        	/* 46 */
  "BLACKHOLE",	        	/* 47 */
  "BLACKHOLE_BQ",	        /* 48 */
  "SE_BLACKHOLE",		/* 49 */
  "SE_CAF_BLACKHOLE",		/* 50 */
  "MVAR",		        /* 51 */
  "ARR_WORDS",	        	/* 52 */
  "MUT_ARR_PTRS",	        /* 53 */
  "MUT_ARR_PTRS_FROZEN",     	/* 54 */
  "MUT_VAR",		        /* 55 */
  "WEAK",		        /* 56 */
  "FOREIGN",		        /* 57 */
  "STABLE_NAME",	        /* 58 */
  "TSO",		        /* 59 */
  "BLOCKED_FETCH",	        /* 60 */
  "FETCH_ME",                   /* 61 */
  "FETCH_ME_BQ",                /* 62 */
  "RBH",                        /* 63 */
  "EVACUATED",                  /* 64 */
  "REMOTE_REF",                 /* 65 */
  "N_CLOSURE_TYPES"         	/* 66 */
};

comment:5 Changed 15 months ago by simonmar

  • Difficulty set to Unknown

This might be another symptom of these bugs I fixed yesterday:

commit 490920583817a650e45956025fce64af2ea1bb92
Author: Simon Marlow <marlowsd@gmail.com>
Date:   Wed Jan 30 15:42:01 2013 +0000

    We should be including HaskellMachRegs.h here, not RtsMachRegs.h
    
    This was causing GenApply.hs to use the host architecture's register
    settings rather than the target's, with the result that some
    cross-compiled programs would crash.

commit a217e7a27a8d48095e2e276ed07a203254bf8743
Author: Simon Marlow <marlowsd@gmail.com>
Date:   Wed Jan 30 19:40:07 2013 +0000

    include "stg/MachRegs.h" -> include "MachRegs.h"
    
    We were getting the installed compiler's MachRegs.h sometimes (in
    GenApply.hs, as it turns out).  This probably caused some weird
    effects...

these were causing similar kinds of crashes with an RPi cross compiler.

comment:6 Changed 15 months ago by dterei

  • Owner set to dterei

Stephen can you confirm this bug still occurs with Simon's patches? After that I'll start taking a look at it as time allows.

comment:7 Changed 15 months ago by StephenBlackheath

  • Resolution set to fixed
  • Status changed from new to closed

I pulled those changes and I now have a working "Hello, World!" program cross-compiled to ARM linux.

By the way, I'll just draw your attention to these two very small patches that fix some cross-compiling issues and make everything work: #7639 #7591

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