Ticket #5824: 0001-fix-ARM-s-StgCRun-clobbered-register-list-for-both-A.patch

File 0001-fix-ARM-s-StgCRun-clobbered-register-list-for-both-A.patch, 1.6 KB (added by kgardas, 3 years ago)

The patch fixing StgCRun clobbered regs list for both ARM and Thumb modes

  • rts/StgCRun.c

    From 957f778cb971d63cbbea0c71c727c94474b1b905 Mon Sep 17 00:00:00 2001
    From: Karel Gardas <[email protected]>
    Date: Tue, 14 Feb 2012 08:01:47 +0100
    Subject: [PATCH 1/2] fix ARM's StgCRun clobbered register list for both ARM and Thumb modes
     rts/StgCRun.c |   16 +++++++++++++++-
     1 files changed, 15 insertions(+), 1 deletions(-)
    diff --git a/rts/StgCRun.c b/rts/StgCRun.c
    index 17aefb6..9ca22d2 100644
    a b StgRun(StgFunPtr f, StgRegTable *basereg) { 
    672672        "ldmfd sp!, {r4-r11, fp, ip, lr}\n\t" 
    673673      : "=r" (r) 
    674674      : "r" (f), "r" (basereg), "i" (RESERVED_C_STACK_BYTES) 
    675       : "%r4", "%r5", "%r6", "%r8", "%r9", "%r10", "%r11", "%fp", "%ip", "%lr" 
     675#if !defined(__thumb__) 
     676        /* In ARM mode, r11/fp is frame-pointer and so we cannot mark 
     677           it as clobbered. If we do so, GCC complains with error. */ 
     678      : "%r4", "%r5", "%r6", "%r7", "%r8", "%r9", "%r10", "%ip", "%lr" 
     680        /* In Thumb mode r7 is frame-pointer and so we cannot mark it 
     681           as clobbered. On the other hand we mark as clobbered also 
     682           those regs not used in Thumb mode. Hard to judge if this is 
     683           needed, but certainly Haskell code is using them for 
     684           placing GHC's virtual registers there. See 
     685           includes/stg/MachRegs.h Please note that Haskell code is 
     686           compiled by GHC/LLVM into ARM code (not Thumb!), at least 
     687           as of February 2012 */ 
     688      : "%r4", "%r5", "%r6", "%r8", "%r9", "%r10", "%fp", "%ip", "%lr" 
    676690    ); 
    677691    return r;